📅 Sep 23
Lead verification for complex SoC and IP designs, building reusable SystemVerilog and UVM environments, driving simulation and coverage closure, and mentoring engineers across design and validation teams.
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Powerlattice
6 open roles at Powerlattice
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📅 Sep 10
Leads laboratory evaluation of chiplet power converters for customer accounts, diagnosing application issues, documenting root causes, and developing solutions, guidance, and technical materials for AI and advanced computing.
📅 Aug 21
Drive complex silicon IC and hardware programs from planning through production, coordinating cross-functional engineering teams and external partners to deliver high-quality products on schedule.
📅 Aug 19
Own digital design blocks from microarchitecture through RTL development, SoC integration, and implementation, collaborating across verification, physical design, and DFT to meet functional, timing, power, and testability goals.
📅 Aug 6
Support tier-one customers adopting chiplet-based power delivery solutions, guiding SoC power design from early modeling through physical design and system bring-up while connecting customer needs with internal teams.
📅 Jul 9
Design analog and mixed-signal ICs from specification through post-layout verification and silicon validation, partnering with layout, verification, and validation teams to deliver robust, production-ready circuit blocks.
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