Design and optimize hardware-facing kernels, collaborate with ML research and hardware engineering teams, and guide hardware architecture decisions to ensure smooth integration with the software stack.
Matx jobs
Chip maker serving the large model needs of frontier labs.
40 open roles at Matx
Build and evolve the Bluespec language, compiler, libraries, and developer tools, partnering with hardware teams to improve design productivity, verification, and the reliability of their engineering workflows.
Own verification of compute hardware from block and subsystem testing through full-chip validation, software qualification, coverage closure, and sign-off milestones leading to design freeze and tapeout.
Own end-to-end diagnostics for accelerator boards and racks, developing test tools and coverage while supporting manufacturing partners, production ramps, and root-cause analysis of failures.
Own microarchitecture and RTL for compute silicon, taking blocks and subsystems from architecture through sign-off while driving design reviews, closure, and collaboration across verification, DFT, and physical design.
2027 interns join a hardware, software, or research team as full members, shipping real work on problems matched to their background with mentorship and exposure across teams.
Build and maintain automation that enforces silicon design and verification methodology, turns CI and regression results into signoff evidence, and helps engineering teams improve checks and workflows.
Own facilities operations, construction projects, and building security, partnering across workplace, security, IT, and People teams while establishing and scaling the function.
Architect and manage ERP, PLM, procurement, and inventory systems, integrating supply chain data and automating workflows to improve accuracy, visibility, and operational scalability.
Own global sourcing strategy for datacenter racks and critical hardware, leading supplier selection, negotiations, and partnerships while improving total cost of ownership and securing quality and supply.
Oversee the full lifecycle of supplier and commercial contracts, building efficient contract workflows, tracking obligations, and partnering with Legal and business teams to manage risk and compliance.
Provide first-line IT support for 100+ users, manage device and account provisioning across MacBook, ChromeOS, and Linux, and help maintain secure, reliable office technology.
Design production silicon RTL at the full-chip or subsystem level using Bluespec, building reusable hardware libraries and exploring architecture tradeoffs for compute, memory, and connectivity.
Own SoC top-level RTL integration, automation, and sign-off, partnering across design and physical design teams to connect subsystems and support high-performance silicon implementation.
Build infrastructure that helps coding agents work safely and effectively across engineering systems, including secure execution environments, auditable access, and a shared knowledge base.
Build and evaluate AI agent tooling for chip design workflows, partnering with RTL, design verification, and physical design engineers to improve agent context, tools, harnesses, and reliability.
Lead and grow a kernel engineering team while setting technical direction and coding high-performance compute kernels for specialized AI hardware in partnership with ML and hardware teams.
Translate AI accelerator architectures into performance models, maintain modeling frameworks, automate tensor layouts for frontier LLMs, and build tools that support experiments across ML, software, and architecture teams.
Develop board-management firmware for AI platforms, owning embedded capabilities from board bring-up through production, including sensor monitoring, power and thermal management, firmware updates, and hardware health reporting.
Design Linux kernel and userspace drivers, system management software, and low-level tools for custom AI hardware, partnering with hardware and firmware teams to bring up and support production platforms.
Secure software, build systems, and cloud infrastructure across silicon and ML workloads, while advancing supply-chain integrity, conducting hands-on security assessments, and turning findings into durable engineering fixes.
Own the purchase-to-pay cycle and spend-management systems for hardware programs, coordinating suppliers, logistics, invoices, and reporting while helping scale procurement processes and material planning.
Own cross-functional execution of advanced silicon hardware programs from early planning through tapeout, coordinating engineering teams, managing technical risks and dependencies, and driving readiness across the silicon lifecycle.
Own NPI manufacturing for AI chips, compute trays, and rack-scale systems, developing and qualifying scalable production processes from EVT through mass production while driving factory readiness, yield, and capacity.
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