Quadric is redefining edge AI with the industry's first General Purpose Neural Processing Unit (GPNPU), enabling developers to run both neural network inference and conventional C++ code on a single programmable architecture. Our technology powers intelligent edge devices across automotive, industrial, robotics, and embedded systems.
Founded in 2016 and based in downtown Burlingame, California, Quadric is building the world's first supercomputer designed for the real-time needs of edge devices. Quadric aims to empower developers in every industry with superpowers to create tomorrow's technology, today. The company was co-founded by technologists from MIT and Carnegie Mellon, who were previously the technical co-founders of the Bitcoin computing company 21.
Quadric is building a revolutionary new processor-based SoC architecture. As a Staff SoC Design Engineer, you will get in on the ground floor as a key member of our chip design team, contributing across all stages of the SoC design and integration cycle. In this role, you will help define the SoC architecture, own subsystem development, integrate third-party IP, and drive PPA optimization to bring our next-generation platform to life.
Own SoC-level subsystem development and seamless integration with third-party IP (such as NoC, PCIe/UCIe interfaces, DDR, Security, etc.).
Contribute directly to the definition of the SoC architecture by deeply understanding its application requirements.
Package designs for customer releases and rapidly iterate based on customer feedback.
Own Power, Performance, and Area (PPA) optimization strategies at the SoC level.
Apply low-power digital design techniques to optimize hardware efficiency.
Contribute to timing closure across the full product lifecycle, spanning front-end, back-end, and final tapeout stages.
Balance single-stream latency against scaled throughput performance.
Within your first 6–12 months, you'll:
Independently own SoC subsystem development and drive measurable PPA improvements.
Develop an in-depth understanding of the architecture and software interfaces, enabling you to debug complex issues across the full SW/HW stack.
Successfully package and deliver design releases for customer evaluation and integration.
BS, MS, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field.
Minimum 5+ years of hands-on SoC/ASIC front-end design and integration experience.
Proficiency in SystemVerilog or Verilog.
Strong background in computer architecture, low-power digital design techniques, and deep technical knowledge in at least one subsystem (Memory, I/O, or Compute).
Proven experience with SoC subsystems (including 3rd-party IP) and working knowledge of VCS & Verilog/C Co-Simulation.
Experience in logic synthesis and performance modeling.
Experience in FPGA design.
Familiarity with automotive safety standards (ASIL) and hardware security standards.
In addition to a competitive salary, we offer a variety of benefits to support your needs. The benefits below reflect our India-based offerings; for roles in other locations, benefits vary and are shared during the hiring process. These include:
Medical, dental, and vision insurance
Equity with the business
Paid Parental Leave
PF Retirement Plan
Flexible PTO
Winter holiday shutdown
Catered lunch each day in our office
Downtown Pune office location, close to shops, cafes, and local amenities
Collaborative, low-ego culture with significant ownership and impact
A work culture focused on innovative disruption
If this role resonates with you, we encourage you to apply even if your experience does not perfectly match every qualification. We value potential, curiosity, and a willingness to learn just as much as direct experience.
If this role resonates with you, we encourage you to apply even if your experience does not perfectly match every qualification. We value potential, curiosity, and a willingness to learn just as much as direct experience.
Quadric is an equal opportunity employer. We do not discriminate on the basis of race, color, religion, sex, national origin, age, disability, veteran status, sexual orientation, gender identity, marital status, medical condition, or any other characteristic protected by applicable federal, state, or local law
Quadric participates in the E-Verify program to confirm employment eligibility for U.S.-based roles. As part of this process, applicants may review the following notices, which explain your rights and our participation in E-Verify. These notices are provided in English and Spanish.
No action is required from candidates during the application process. These notices are provided for informational purposes only.
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Own SoC subsystem development and third-party IP integration, help define processor architecture, and drive low-power design, PPA optimization, and timing closure through tapeout and customer releases.
Leads RTL design for thermodynamic hardware from microarchitecture through tapeout, shaping architecture, guiding the RTL team, and partnering across verification and physical design to achieve signoff.
Own FPGA platform selection, RTL implementation, and lab validation for ASIC prototyping and silicon bring-up, while building the software and automated test infrastructure that connects hardware to development teams.
Define and lead architecture, microarchitecture, and RTL implementation for next-generation autonomous vehicle SoCs, optimizing performance, power, and area while guiding subsystem design, vendor collaboration, and tapeout.
Design mixed-signal IC digital subsystems and SoC blocks from architecture through tape-out, developing Verilog RTL and DSP, control, and data-path logic while supporting verification, silicon validation, and production.
