Analog Mixed Signal Modeling Engineer (UL - 02)

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn’t do it without our extraordinary workforce – and that’s where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career! #LI-Hybrid #LI-EK1 #HOTT Export control restrictions based upon applicable laws and regulations would prohibit candidates who are nationals of certain embargoed countries from working in this position without Cirrus Logic first obtaining an export license.  Candidates for this role must be able to access technical data without a requirement for an export license. We are unable to sponsor or obtain export licenses for this role. Cirrus Logic strives to select the best qualified applicant for any opening. Different approaches, ideas and points of view are both valued and respected. Employment decisions are made on the basis of job-related criteria without regard to race, color, religion, sex, national origin, age, protected veteran or disabled status, genetic information, or any other classification protected by applicable law.

Responsibilities:

You will contribute to a team that generates & verifies advanced analog circuit equivalent models to support analog design, UVM verification, & HW/SW validation platforms

Collaborate with system architects and designers to streamline architectural exploration of next-generation IP

Develop behavioral models using SystemVerilog Real Number Modeling (SV-RNM), User-defined Types(SV-UDT), & Verilog AMS

Develop DMS & AMS test plans, test benches, and verification methodologies to verify microarchitectures

Collaborate with multi-functional teams to streamline chip-level integration and maintain continuity of design, verification, and modeling feature drop plans

Serve as a primary mixed signal design regression debug support

Develop DMS & AMS test platforms and execute DMS & AMS test plans

Contribute to analog design reviews and recommend enhancements for improved circuit design and partitioning

Collaborate with UVM verification engineers to ensure all verification components are used for AMS-UVM flow

Contribute to development of automation tools for design, verification and modeling

Required Skills and Qualifications:

Master's degree or higher in Electrical Engineering or Computer Engineering

Experience in development of mixed-signal products

Strong background in analog integrated circuit design & proficient in interpreting circuit schematics

Strong background in digital signal processing and control systems

Strong background in System Verilog for real number modeling (RNM) modeling, test bench development & verification

Organized and detailed with strong x-functional communication skills

Possess outstanding analytical and problem-solving skills

Proficient in use of AMS simulators

Preferred Skills and Qualifications:

Teaming closely with digital/analog designers, applications engineers, and manufacturing test to support both pre-silicon verification and post-silicon validation efforts

Knowledge of signal processing and System Verilog Assertions and PSL Assertions

Experience with database management methodologies (Perforce, GIT, etc…)

Working knowledge of UVM verification flows

Working knowledge of Formal verification flows

Simulink & Simscape

Python scripting experience